Abrading – Abrading process – With tool treating or forming
Reexamination Certificate
2001-03-30
2003-06-17
Hail, III, Joseph J. (Department: 3723)
Abrading
Abrading process
With tool treating or forming
C451S041000, C451S072000, C451S286000, C451S443000
Reexamination Certificate
active
06579157
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to chemical mechanical planarization (CMP) systems and techniques for improving the performance and effectiveness of CMP operations. Specifically, the present invention relates to CMP systems that implement polishing pads with improved post-conditioned surfaces.
2. Description of the Related Art
In the fabrication of semiconductor devices, there is a need to perform CMP operations, including topography planarization, polishing, buffing, and post-CMP wafer cleaning. Typically, integrated circuit devices are in the form of multi-level structures. At the substrate level, transistor devices are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistors to define the desired functional devices. As is well known, patterned conductive layers are insulated from other conductive layers by dielectric materials, such as silicon dioxide. At each metallization level and/or associated dielectric layer, there is a need to shape the metal interconnects and/or planarize the dielectric material. Without planarization, fabrication of additional metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In other applications, metallization line patterns are formed in the dielectric material, and then metal CMP operations are performed to remove the overburden metallization.
CMP systems typically implement rotary, belt, or orbital material removal approaches, brush stations, and spin/rinse dryers in which belts, pads, or brushes are used to polish, buff, scrub, rinse, and dry one or both sides of a wafer. Slurry is used to assist the CMP operation. Slurry is most usually introduced onto a moving preparation surface, e.g., belt, pad, and the like, and distributed over the preparation surface as well as the surface of the semiconductor wafer being buffed, polished, or otherwise prepared by the CMP process. The distribution is generally accomplished by a combination of the motion of the preparation surface, the motion of the semiconductor wafer and the pressure created between the semiconductor wafer and the preparation surface.
An exemplary prior art CMP system
100
is illustrated in FIG.
1
. The CMP system
100
is a belt-type system, so designated because the preparation surface is an endless polishing pad
108
mounted on two drums
114
which drive the polishing pad
108
in a rotational motion as indicated by polishing pad rotation directional arrows
116
. A wafer
102
is mounted on a carrier
104
, which rotates in a direction
106
. The rotating wafer
102
is then applied against the rotating polishing pad
108
with a force F. Some CMP processes require a significant force F to be applied. A platen
112
is provided to stabilize the polishing pad
108
and to provide a surface onto which to apply the wafer
102
. Typically, the platen
112
applies air to a gap between a top side of the platen
112
and the underside of the pad
108
. Slurry
118
, typically including an aqueous solution containing dispersed abrasive particles (e.g., SiO
2
, Al
2
O
3
, CeO
2
, etc.) is introduced upstream of the wafer
102
.
Normally, the polishing pad
108
is composed of porous or fibrous materials. However, over a period of polishing, a residue consisting of abrasive particles of the slurry
118
and the by-products removed from the surface of the wafer
102
accumulates over the surface of the polishing pad
108
, thus affecting the polishing rate and planarization efficiency. As a result, to maintain a stable material removal rate and high planarization efficiency, there is a need to condition the surface of the polishing pad
108
.
As illustrated in
FIG. 1
, the polishing pad
108
is conditioned by applying a conditioning disk
122
onto the surface of the polishing pad
108
. The conditioning disk
122
is mounted on a conditioning head
124
and moves along a track bar
123
across the polishing pad
108
. Typically, the conditioning disk
122
includes a plurality of diamonds (not shown in this Figure) which are applied onto the surface of the polishing pad
108
, thus removing the residue clogging the porous surface of the polishing pad
108
. In addition to unclogging the pores, the conditioning disk
122
further removes the worn surface of the polishing pad
108
, thus exposing a fresh layer of pad material. However, while pad conditioning positively effects the CMP process, it also affects the surface roughness of the polishing pad
108
thus degrading the planarization efficiency of the polishing pad
108
.
The effects of conditioning on the polishing pad
108
can further be understood with reference to the enlarged, partial, cross-sectional view of the post-conditioned polishing pad
108
depicted in prior art FIG.
2
A. As illustrated, a plurality of air pockets
108
d
are disbursed through out the surface of the polishing pad
108
. Initially, a surface
108
c
of an unused polishing pad
108
is covered with air pockets
108
d
, which in a conditioning operation, are ripped open creating pores
108
b
and pad roughness features herein defined as asperities
108
a
. Thereafter, during the CMP operation, the slurry
118
is introduced onto the surface of the surface
108
c
of the polishing pad
108
such that the pores
108
b
and asperities
108
a
are covered with slurry
118
. As shown, asperities
108
a
have different sizes and shapes.
Prior art
FIG. 2B
is an illustration of asperities
108
a
-
1
,
108
a
-
2
, and
108
a
-
3
, each having a different shape and size. As shown, the conditioning and roughening of the surface
108
c
of the polishing pad
108
creates the asperities
108
a
-
1
,
108
a
-
2
, and
108
a
-
3
some of which significantly protrude above the surface
108
c
(e.g., asperity
108
a
-
1
). As discussed below with respect to
FIGS. 3A-3C
and
4
A-
4
E, the formation of the asperities
108
a
, and specifically, the asperities that significantly protrude above the surface
108
c
are problematic during the CMP operation, as among others, the asperities
108
a
intrude into the depths of the features, thus degrading planarization uniformity.
The prior art
FIG. 3A
depicts an enlarged, partial, cross-sectional view of an ideal post-CMP oxide layer
250
having a heterogeneous top surface
250
a
. As shown, a plurality of copper metallization lines
254
,
256
, and
258
and a conductive via
251
have been fabricated in the oxide layer
250
implementing a dual damascene process. As is well known, in a dual damascene process, there is a need to perform a CMP operation so as to planarize and remove the over-burden copper material from over the heterogeneous top surface
250
a.
As shown, the copper metallization line
254
has two boundary sidewalls
255
a
and
255
b
. Ideally, sharp corners
254
a
and
254
b
should respectively be created at the intersection of boundary side-walls
255
a
and
255
b
with the corresponding oxide regions
250
d
and
250
c
of the heterogeneous top surface
250
a
. In a like manner, each of the copper metallization lines
256
and
258
has respective boundary side-walls
257
a
,
257
b
, and
259
a
with oxide regions
250
c
and
250
b
, respectively. Again, in theory, sharp corners
256
a
,
256
b
, and
258
a
should correspondingly be created at the intersection of each of the boundary sidewalls
257
a
,
257
b
, and
259
a
with the respective oxide regions
250
c
and
250
b
. Additionally, in theory, subsequent to the CMP operation, a top surface
254
c
,
256
c
, and
258
c
of each of the respective copper metallization lines
254
,
256
, and
258
should be in the same level as the heterogeneous top surface
250
a
. That is, it is expected that the thickness of the copper metallization lines
254
,
256
, and
258
stay the same throughout each of the copper metallization lines. However, this is not an accurate representative of a real post-CMP oxide layer.
Normally, the top surfaces of the copper
Gotkis Yehiel
Kistler Rodney
Owczarz Aleksander A.
Lam Research Corporation
Ojini Anthony
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