PMOS transistor with discontinuous CESL and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S347000, C257S344000, C257S336000

Reexamination Certificate

active

07615426

ABSTRACT:
A transistor having a discontinuous contact etch stop layer comprising: a substrate having a surface, a gate dielectric on said surface of said substrate, a gate electrode on said gate dielectric, a spacer along a sidewall of said gate dielectric and gate electrode, a source and a drain formed on opposite sides, respectively, of said gate dielectric and said gate electrode, the source and drain defining a channel region having a channel length extending substantially from said source to said drain, in the substrate therebetween, and a contact etch stop layer on said gate and said spacers, and said source and drain. The contact etch stop layer is substantially locally continuous in a direction perpendicular to the channel region length and substantially locally discontinuous in a direction parallel to the channel region length.

REFERENCES:
patent: 5739573 (1998-04-01), Kawaguchi
patent: 5757045 (1998-05-01), Tsai et al.
patent: 6004861 (1999-12-01), Gardner et al.
patent: 6096591 (2000-08-01), Gardner et al.
patent: 6346468 (2002-02-01), Pradeep et al.
patent: 6864126 (2005-03-01), Kim
patent: 7053400 (2006-05-01), Sun et al.
patent: 7141476 (2006-11-01), Dao
patent: 7176520 (2007-02-01), Miyake et al.
patent: 7279754 (2007-10-01), Moniwa et al.
patent: 7371629 (2008-05-01), Fu et al.
patent: 7468303 (2008-12-01), Sugihara
patent: 594976 (2004-06-01), None
Kumagai, Y., et al., “Evaluation of Change in Drain Current Due to Strain in 0.13-μm-node MOSFETs,” Extended Abstracts of the 2002 International Conference on Solid State Devices and Materials, Nagoya, 2002, pp. 14-15.

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