Plasma processing comprising three rotational motions of an...

Etching a substrate: processes – Gas phase etching of substrate – Application of energy to the gaseous etchant or to the...

Reexamination Certificate

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C118S730000, C204S199000, C204S212000, C427S481000, C427S240000, C156S345550

Reexamination Certificate

active

06749764

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to processing of materials, and more particularly to plasma processing.
Plasma processing is widely used to modify surface properties of materials. Thus, plasma is used in fabrication of integrated circuits to perform deposition, etch, cleaning, and rapid thermal anneal. Plasma-based surface processes are also used for hardening of surgical instruments and machine tools, and are used in aerospace, automotive, steel, biomedical, and toxic waste management industries. See, for example, M. A. Lieberman and A. J. Lichtenberg. “Principles of Plasma Discharges and Materials Processing” (1994), page 1.
For some applications there are unique advantages to etching a semiconductor wafer with plasma. For example, the backsides of semiconductor wafers are sometimes etched to make the wafers thinner after the components and circuitry have been fabricated on the frontside of the wafer. The wafer can then be separated into dice. Plasma etching is used for wafer thinning because other thinning techniques (e.g., grinding) create too much stress on the wafer and may damage the wafer.
A common goal in plasma processing is high throughput and high processing uniformity.
FIG. 1
shows a prior art plasma processing system
110
described in U.S. patent application Ser. No. 08/975,403 and PCT application WO 99/26796 which are incorporated herein by reference. Plasma source
114
generates a plasma jet
120
schematically shown by an arrow. Carrousel
124
has five wafer holders
130
(or some other number of wafer holders) each of which holds a semiconductor wafer. The wafers, not shown in
FIG. 1
, are positioned beneath the holders
130
. Plasma jet
120
flows upwards and impinges on the wafers bottom surfaces. Holders
130
may be non-contact vortex holders (these holders do not contact the wafers top surface), or they may be contact holders that hold the wafers by vacuum or by electrostatic or mechanical means.
Plasma processing occurs at atmospheric pressure. Plasma jet
120
is too narrow to cover an entire wafer, so the wafers are moved in and out of the plasma in a predetermined pattern aimed at achieving uniform processing. Each holder
130
is rigidly attached to a respective arm
140
A of an angle drive
140
. Angle drive
140
rotates the wafers around a vertical axis
140
X. Angle drive
140
has a body
140
B rigidly attached to an arm
150
A of an angle drive
150
. Drive
150
rotates the arm around a vertical axis
150
X. Control system
154
(e.g. a computer) controls the drives
140
and
150
.
Plan view
FIGS. 2A-2C
illustrate the wafer path. Only one wafer
134
is shown for simplicity. For each position of arm
150
A, wafers
134
sweep through a ring-shaped (donut-shaped) path
202
centered at axis
140
X. The actual path swept by the wafers is not a ring since drive
150
is not stationary, but a ring is a fair approximation of the wafer path if angular velocity W
1
of drive
150
is several times smaller than angular velocity W
2
of drive
140
.
Numeral
220
denotes a stationary horizontal line that intersects the axis
150
X and the center of plasma jet
120
. Angle &THgr; is the angle between the line
220
and the arm
150
A.
In FIG.
2
A. &THgr;=0. Axis
140
X is in its farthest position from plasma
120
. The arms
140
A,
150
A, and the distance between the center of plasma
120
and the axis
150
X, are dimensioned so that at &THgr;=0 the wafers do not pass over the plasma. This eliminates plasma processing during wafer loading and unloading. (Wafer loading and unloading occur at &THgr;=0.)
In the example of
FIGS. 2A
,
2
B,
2
C, arm
150
A rotates clockwise. In
FIG. 2B
, the angle &THgr; has increased to some value &THgr;
1
, and the outer edge
134
F of wafer
134
has entered the plasma
120
. (The “outer edge” refers to the most distant edge from axis
140
X.) As &THgr; continues to increase, the plasma processes wafer points closer and closer to axis
140
X. In
FIG. 2C
, the plasma processes the wafer edge
134
C closest to axis
140
X (&THgr; is some value &THgr;
2
). When angle &THgr; is 180°, no plasma processing takes place.
As &THgr; increases from 180° to 360°, the wafer path
202
returns to its position in
FIG. 2A
via a symmetric route. For each value &THgr;
o
between 180° and 360°, the positions of ring
202
for &THgr;=&THgr;
o
and &THgr;=360°−&THgr;
o
are symmetric to each other relative to line
220
.
An advantage of the system of
FIG. 1
is that there is no need to move the plasma source
114
. (In some earlier systems, a single wafer was positioned at the location of axis
140
X; the plasma source had to move towards and away from the axis
150
X to process the whole wafer.)
To achieve uniform processing, the system of
FIG. 1
attempts to make each point on the wafer pass through the plasma the same number of times and spend the same amount of time in the plasma. The velocity W
1
of drive
150
varies so that the wafer points located farther from axis
140
X spend about the same time in the plasma as the points closer to the axis
140
X. The wafer passes multiple times over the plasma during each revolution of drive
150
. The paths traced by the plasma on the wafer surface in consecutive revolutions of drive
140
overlap. The overlap is particularly desirable because the plasma jet
120
may have non-uniform heat distribution across the jet's horizontal cross section.
It is desirable to further improve processing uniformity while maintaining high processing throughput.
SUMMARY
In the system of
FIG. 1
, processing uniformity may suffer at the wafer edges due to unstable plasma behavior when the wafer enters and exits the plasma. Another reason why the processing uniformity may suffer is as follows. As the wafer moves through the plasma, the processing byproducts are generated at the bottom surface of the wafer. These byproducts may impede the wafer processing near the wafer edge exiting the plasma.
To improve the processing uniformity, one can change the direction of the W
2
rotation during processing. This solution is described in U.S. patent application Ser. No. 09/315,122 filed May 19, 1999 by O. Siniaguine et al. and incorporated herein by reference. Disadvantageously, changing the direction of the W
2
rotation tends to increase the processing time. It is therefore desirable not to change the direction of the W
2
rotation, or at least to reduce the number of times that the direction of the W
2
rotation is changed.
Another problem noted in the U.S. patent application Ser. No. 09/315,122 relates to different cooling times obtained for the wafer points at different distances from the axis
140
X of drive
140
. As illustrated in
FIGS. 2A
,
2
B, and
2
C, the entire wafer is processed during each half-revolution of drive
150
. The wafer is processed once when &thgr; changes from 0 to 180°, and once when &thgr; changes from 180° to 360°. Each point P on the wafer's bottom surface is processed when &thgr; is at or near some value &thgr;
P
. When
0
increases past the value &thgr;
P
, the point P is moved out of the plasma and is therefore cooled. The point P does not re-enter the plasma until &thgr; reaches the value 360°−&thgr;
P
in the next half-revolution of drive
150
. Then the point P becomes processed again, and then is cooled again until the angle &thgr; becomes equal to &thgr;
P
.
As shown in the U.S. patent application Ser. No. 09/315,122, the cooling times may be different for different points on the wafer. To equalize the cooling times, U.S. patent application Ser. No. 09/315,122 proposes to suppress plasma processing during one half of each revolution of drive
150
. For example, plasma processing could take place only when &thgr; changes from 0° to 180°, or only when &thgr; changes from 180° to 360°. Disadvantageously, suppressing the plasma processing during one half of each revolution tends to increase processing time.
In some embodiments of the present invention, the wafer is subjected to a t

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