Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-09-29
2002-01-29
Ghylka, Alexander G. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S683000, C438S685000, C438S686000, C438S688000
Reexamination Certificate
active
06342446
ABSTRACT:
FIELD OF THE INVENTION
The instant invention pertains to semiconductor device fabrication and processing and more specifically to post metal pattern and etch clean-up processing.
BACKGROUND OF THE INVENTION
Most semiconductor devices utilize several different levels of metallization. With the increasing complexity of devices and the need to reduce the physical size of devices, the number of levels which incorporate metal connections is increasing. In addition, with the desire to increase the speed of the devices while reducing the power consumed by the devices, advanced metallization schemes are being developed. One such scheme involves the use of copper-doped aluminum or copper structures for the bus lines and interconnects. Additionally, interlevel dielectrics with lower dielectric constants than standard silicon dioxide films may be used as the dielectric material situated between metallic structures.
A problem that most semiconductor manufacturers face is the cleaning up of the metallic structures after the structures are patterned and etched. More specifically, the photoresist needs to be removed, and the residual metal halide etch byproducts have to be removed or converted to different chemical forms to avoid corrosion of the metal. These processes, commonly known as strip and passivation processes, may cause non-conducting residues to form on the metallic structure. In order to address this problem, a cleaning step is typically performed after the underlying metal structure is exposed and the photoresist is removed. The cleanup step will preferably remove all of the residue, typically comprised of polymers, that are formed on the metal structure, thus inhibiting corrosion of the metal structures. However, the clean step must not appreciably affect the electrical critical dimension (CD) of the metal structure.
For a typical Cu metallization scheme, a standard H
2
plasma strip process (see co-pending patent application Ser. No. 09/199,829, TI-25250, assigned to Texas Instruments) is performed to remove photoresist after a via oxide etch process. Since a photoresist strip with O
2
plasma causes substantial oxidation to any exposed Cu at the bottom of the via, this approach is generally not used. This is so even though a Si
3
N
4
barrier layer is present, and the via etch process completes to the Si
3
N
4
layer, without passing through the Si
3
N
4
layer. The nitride layer must then be removed in a separate wet or dry etch process. Thus, a dry plasma etch process which could be used to remove photoresist without oxidation of Cu would simplify the process flow by either eliminating the need for the Si
3
N
4
barrier layer, or substantially thinning it (it might still be useful as an etch stop layer for via formation). Removal or thinning of the Si
3
N
4
barrier layer would ease the oxide etch selectivity requirements since stopping the etch on the Si
3
N
4
layer would not be necessary.
SUMMARY OF THE INVENTION
An embodiment of the instant invention is a method of fabricating an electronic device formed on a semiconductor wafer, the method comprising the steps of: forming a conductive structure over the semiconductor substrate, the conductive structure comprised of an oxygen-sensitive conductor and having an exposed surface; oxidizing a portion of the conductive structure; and subjecting the conductive structure to a plasma which incorporates hydrogen or deuterium. The step of oxidizing a portion of the conductive structure may result in the conductive structure being more resistive, and the step of oxidizing a portion of the conductive structure may include oxidizing the exposed portion of the conductive structure. The step of subjecting the conductive structure to a plasma which incorporates hydrogen or deuterium may result in the oxidized conductive structure becoming more conductive than it was in its oxidized state. Preferably, the oxygen-sensitive material is comprised of: copper, tantalum, tantalum nitride, titanium, titanium nitride, titanium silicide, tungsten, tungsten nitride, tungsten silicide, aluminum, copper-doped aluminum, silver, gold, ruthenium, ruthenium oxide, iridium, platinum, cobalt, cobalt silicide, and any combination thereof.
Another embodiment of the instant invention is a method of fabricating an electronic device formed on a semiconductor wafer, the method comprising the steps of: forming a conductive structure over the substrate, the conductive structure comprised of an oxygen-sensitive conductor; forming a layer of dielectric material over the conductive structure; forming a photoresist layer over the layer of the dielectric material; patterning the layer of the dielectric material; removing the photoresist layer after patterning the layer of the dielectric material; subjecting the semiconductor wafer to a plasma which incorporates oxygen and a substance selected from the group consisting of: CF
4
, C
2
F
6
, CHF
3
, CFH
3
, another fluorine-containing hydrocarbon, and any combination thereof; and reducing oxides formed in the conductive structure by subjecting the semiconductor wafer to a plasma which incorporates a gas which includes hydrogen or deuterium. In an alternative embodiment, the step of removing the photoresist layer is performed by subjecting the semiconductor wafer to the plasma which incorporates a gas which includes hydrogen or deuterium. Preferably, the plasma also includes NH
3
, N
2
H
2
, H
2
S, CH
4
or deuterated forms of these gases. The oxygen-sensitive material is, preferably, comprised of: copper, tantalum, tantalum nitride, titanium, titanium nitride, titanium silicide, tungsten, tungsten nitride, tungsten silicide, aluminum, copper-doped aluminum, silver, gold, ruthenium, ruthenium oxide, iridium, platinum, cobalt, cobalt silicide, and any combination thereof.
REFERENCES:
patent: 6071813 (2000-06-01), Nogami
patent: 6017192 (2000-08-01), Subrahmanyan et al.
Rotondaro Antonio L. P.
Smith Patricia B.
Brady III W. James
Ghylka Alexander G.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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