Plasma etch method for forming patterned layer with enhanced...

Semiconductor device manufacturing: process – Including control responsive to sensed condition – Optical characteristic sensed

Reexamination Certificate

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C438S016000, C438S714000, C438S717000, C216S067000, C216S060000

Reexamination Certificate

active

06620631

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods for forming patterned layers within microelectronic fabrications. More particularly, the present invention relates to methods for forming, with enhanced linewidth control, such as but not limited to enhanced critical dimension (CD) linewidth control, patterned layers within microelectronic fabrications.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronic conductor layers which are separated by microelectronic dielectric layers.
As microelectronic fabrication integration levels have increased and microelectronic device and patterned microelectronic conductor layer dimensions have decreased, it has become increasingly important within the art of microelectronic fabrication to control the linewidth, and in particular the critical dimension (CD) linewidth, of microelectronic devices and patterned microelectronic layers formed within microelectronic fabrications when fabricating microelectronic fabrications. In particular, enhanced critical dimension (CD) linewidth control is significant when forming microelectronic devices and patterned microelectronic layers within microelectronic fabrications since enhanced critical dimension (CD) linewidth control typically provides microelectronic fabrications fabricated with enhanced functionality, enhanced reliability and/or enhanced yield.
While enhanced critical dimension (CD) linewidth control is thus desirable in the art of microelectronic fabrication when forming microelectronic devices and patterned microelectronic layers within microelectronic fabrications, enhanced critical dimension (CD) linewidth control is nonetheless not obtained entirely without problems in the art of microelectronic fabrication when forming microelectronic devices and patterned microelectronic layers within microelectronic fabrications. In that regard, it is often difficult to provide within microelectronic fabrications microelectronic devices and patterned microelectronic layers with enhanced critical dimension (CD) linewidth control, insofar as there often occurs when forming a microelectronic device or a patterned microelectronic layer within a microelectronic fabrication multiple interrelated parameters which affect the linewidth, and in particular the critical dimension (CD) linewidth, of the microelectronic device or the patterned microelectronic layer within the microelectronic fabrication.
It is thus towards the goal of forming within the art of microelectronic fabrication patterned microelectronic layers, such as but not limited to patterned microelectronic layers which may be formed within microelectronic devices, with enhanced linewidth control, and in particular enhanced critical dimension (CD) linewidth control, that the present invention is directed.
Various apparatus and methods have been disclosed in the art of microelectronic fabrication for forming and/or inspecting microelectronic layers which may be fabricated within microelectronic fabrications.
For example, Arimoto et al., in “Monitoring of SRAM Gate Patterns in KrF Lithography by Ellipsometry,” IEEE Trans. of Semiconductor Manufacturing, Vol.12(2), pp. 166-69 (1999), discloses a method for monitoring within an integrated circuit microelectronic fabrication a linewidth of a gate electrode pattern within the integrated circuit microelectronic fabrication while avoiding the use of a scanning electron microscopy (SEM) method for monitoring within the integrated circuit microelectronic fabrication the linewidth of the gate electrode pattern within the integrated circuit microelectronic fabrication. To realize the foregoing object, the method employs an ellipsometric method for monitoring within the integrated circuit microelectronic fabrication the linewidth of the gate electrode pattern within the integrated circuit microelectronic fabrication.
In addition, Moslehi, in U.S. Pat. No. 5,719,495, discloses an apparatus which incorporates a sensor for non-invasive in-situ measurement of a series of physical properties of a microelectronic layer formed over a microelectronic substrate employed within a microelectronic fabrication. To realize the foregoing object, the apparatus incorporates the sensor which senses for a beam of radiation incident upon the microelectronic layer an amount of radiation specularly coherently reflected from the microelectronic layer and an amount of radiation scattered incoherently reflected from the microelectronic layer, both of which radiation specularly coherently reflected from the microelectronic layer and radiation scattered incoherently reflected from the microelectronic layer correlate with the physical properties of the microelectronic layer.
Further, Litvak, in U.S. Pat. No. 5,891,352, discloses a method for determining, in-situ, an endpoint when forming while employing a microelectronic fabrication method a microelectronic layer formed over a microelectronic substrate employed within a microelectronic fabrication. To realize the foregoing object, the method may employ an optical detection method, wherein preferably, the optical detection method employs a radiation beam incident upon a surface of the substrate opposite the surface of the substrate over which is formed the microelectronic layer.
Still further, Kinney et al., in U.S. Pat. No. 5,909,276, discloses an optical inspection apparatus and an optical inspection method which provides for efficient and economic inspection within the art of microelectronic fabrication of a surface of a microelectronic substrate or a microelectronic layer employed within the art of microelectronic fabrication. The optical inspection method employs the optical detection apparatus which in turn employs: (1) a blanket illumination of the microelectronic substrate or the microelectronic layer employed within the microelectronic fabrication, while employing a collimated light beam at a grazing incident angle with respect to the microelectronic substrate or the microelectronic layer employed within the microelectronic fabrication, in conjunction with; (2) a collection by a lens of light non-specularly reflected (i.e., scattered) from the collimated light beam; and (3) a classification of the collected light non-specularly reflected by a photodetector array positioned within the focal plane of the lens.
Finally, Carter et al., in U.S. Pat. No. 5,912,741, discloses a scatterometer apparatus which may be employed for measuring within the context of a two dimensional array multi-directional optical reflection characteristics of a surface of a microelectronic layer formed over a microelectronic substrate employed within a microelectronic fabrication, while not moving the microelectronic substrate over which is formed the microelectronic layer. To realize the foregoing object, the scatterometer apparatus employs a radiation source, a pair of radiation reflectors, a radiation detector and a radiation beam steerer.
Desirable in the art of microelectronic fabrication are additional methods and materials which may be employed for forming within microelectronic fabrications microelectronic devices and patterned microelectronic layers with enhanced linewidth control, such as but not limited to enhanced critical dimension (CD) linewidth control, within microelectronic fabrications.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for forming within a microelectronic fabrication a patterned microelectronic layer.
A second object of the present invention is to provide a method in accord with the first object of the present invention, where the patterned microelectronic layer is formed with enhanced linewidth control, such as but not limited to enhanced critical dimension (CD) linewidth control.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second

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