Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2007-12-11
2007-12-11
Schillinger, Laura M. (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S197000, C438S592000
Reexamination Certificate
active
10999270
ABSTRACT:
A method of defining a patterned, conductive gate structure for a MOSFET device on a semiconductor substrate includes forming a conductive layer over the semiconductor substrate and forming a capping insulator layer over the conductive layer. An anti-reflective coating (ARC) layer is formed over the capping insulator layer and a patterned photoresist shape is formed on the ARC layer. A first etch procedure using the photoresist shape as an etch mask defines a stack comprised of an ARC shape and a capping insulator shape. A second etch procedure using the stack as an etch mask defines the patterned, conductive gate structure in the conductive layer.
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Chen Fang-Cheng
Chiu Yuan-Hung
Lin Huin-Jer
Lin Li-Te S.
Tao Hun-Jan
Haynes and Boone LLP
Schillinger Laura M.
Taiwan Semiconductor Manufacturing Company , Ltd.
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