Parallel bit test circuit and method for semiconductor...

Details Parallel bit test circuit and method for semiconductor... Parallel bit test circuit and method for semiconductor...

2007-02-23

2009-11-24

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S005110, C714S025000, C714S042000, C714S718000, C714S720000, C714S736000, C365S201000

Reexamination Certificate

active

07624317

ABSTRACT:
A semiconductor memory device performs a parallel bit test on a plurality of memory blocks by writing test pattern data into the plurality of memory blocks, outputting two bits from each memory block in parallel and comparing the two bits output from each memory block with each other in a first test mode, and outputting two bits from respectively different memory blocks and comparing the two bits output from the respectively different memory blocks with each other in a second test mode.

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