Panel driving circuit that generates panel test pattern and...

Details Panel driving circuit that generates panel test pattern and... Panel driving circuit that generates panel test pattern and...

2011-04-13

2011-11-08

Trimmings, John (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S742000, C714S724000, C714S733000, C714S734000, C345S050000, C345S053000, C345S204000, C345S213000, C324S701000, C348S181000, C348S184000

Reexamination Certificate

active

08055968

ABSTRACT:
A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.

REFERENCES:
patent: 5448260 (1995-09-01), Zenda et al.
patent: 5502511 (1996-03-01), Nagel
patent: 5668594 (1997-09-01), Cahill, III
patent: 5696540 (1997-12-01), Katsura et al.
patent: 6292182 (2001-09-01), Park et al.
patent: 6784881 (2004-08-01), Wasserman et al.
patent: 6862021 (2005-03-01), Kudo et al.
patent: 6917215 (2005-07-01), Ichikawa
patent: 7143326 (2006-11-01), Fan et al.
patent: 7317453 (2008-01-01), Wang et al.
patent: 7486334 (2009-02-01), Masuda et al.
patent: 2001/0028346 (2001-10-01), Kudo et al.
patent: 2003/0137587 (2003-07-01), Braun
Japanese translation of Patent Application Publication JP10274957, Nakanishi, Oct. 1998, 8 pages.

Affiliated with

Also associated with

Rating

Panel driving circuit that generates panel test pattern and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Panel driving circuit that generates panel test pattern and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Panel driving circuit that generates panel test pattern and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4286276