Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2004-09-22
2008-08-19
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S030000, C714S718000, C714S719000, C714S721000, C714S734000, C714S745000, C714S723000, C714S799000, C324S765010, C365S185220, C365S201000, C365S185010, C365S185240, C365S185300, C365S185330
Reexamination Certificate
active
07415646
ABSTRACT:
Methods of performing a sector erase of flash memory devices incorporating built-in self test circuitry are provided. The present invention employs an interactive verification and sector erase algorithm to verify and repeatedly erase the sector until a portion of the groups of each page of the sector are erased or a first maximum number of erase pulses is achieved. The algorithm further includes a word verification and erase operation that sequentially verifies and erases each word of the sector until each word is erased or a second maximum number of erase pulses is achieved. The second maximum number of erase pulses may be based on a function of the first maximum number of erase pulses. The second maximum number of erase pulses may be input to the sector erase algorithm as a multi-bit code. The second maximum number of erase pulses and conversion of the multi-bit code may be based on a binary multiple of the first maximum number of erase pulses.
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Cheah Ken Cheong
Hamilton Darlene
Lee Mimi
Eschweiler & Associates LLC
Spansion LLC
Trimmings John P
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