4. Static information storage and retrieval
  5. Floating gate
  6. Particular connection

Ken Cheong Cheah

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Address sequencer within BIST (Built-in-Self-Test) system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated tests for built-in self test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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CAM (content addressable memory) cells as part of core array...

Static information storage and retrieval – Associative memories – Ferroelectric cell
Reexamination Certificate

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Diagnostic mode for testing functionality of BIST...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Flexible latency in flash memory

Static information storage and retrieval – Addressing – Sync/clocking
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Profile ID: LFUS-PAI-P-2666353

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