Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-07-22
2002-03-12
Bowers, Charles (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S689000, C438S700000, C438S712000, C438S711000, C438S713000
Reexamination Certificate
active
06355557
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to a plasma etching process. In particular, it relates to a process for etching into silicon oxide an aperture having a complex shape.
BACKGROUND ART
The continuing development of silicon-based integrated circuits has integrated an ever increasing number of semiconductor devices on a single chip. The number is approaching tens of millions, and is still growing. This level of integration has been accomplished in part by ever more complex structures and processes.
One such structure is the inter-level via or contact. To electrically interconnect the tens of millions of devices requires a multi-layer wiring structure. In somewhat regularly arranged memories, two or more wiring layers are needed, while in the more irregularly arranged logic devices five or more wiring layers are currently needed. As illustrated in the cross-sectional view of
FIG. 1
, each wiring level includes an inter-level insulating layer
10
interposed between a lower layer
12
and a metallic upper layer. Typically, the insulating layer
10
is formed of silicon dioxide or related silica glasses, both hereinafter referred to as an oxide. The lower layer
12
may be the silicon substrate in which is already formed various types of semiconductor devices that need to be contacted. Alternatively, the lower layer
12
may be a lower wiring layer which is already formed into a lower interconnect pattern. The upper metal layer
14
is eventually formed into its own interconnect wiring pattern. The interconnect metal is usually aluminum or an aluminum alloy although its composition is not directly related to the present invention.
Usually, the deposition of the upper metal layer
14
includes deposition of the same metal into an aperture
16
preformed in the oxide layer
10
. This invention is directed to the etching of that aperture
16
. If the underlying layer is silicon or polysilicon, the aperture
16
is referred to as a contact hole, and extra care must be exercised to not degrade the semiconducting characteristics of the underlying layer
12
. If the underlying layer is a metal or polysilicon interconnect, the aperture
16
is referred to as a via hole. As the level of integration has increased, the via or contact holes
16
have been required to become narrower and more vertically anisotropic, that is, to have a high aspect ratio of depth to width. Methods for forming highly anisotropic contact and via holes
16
in an oxide have been developed for use in a plasma reactor. A typical method uses a fluorocarbon or hydrofluorocarbon etching gas in an argon carrier gas and applies an RF bias to the pedestal supporting the wafer. The RF bias creates a DC electrical self-bias in the plasma adjacent to the wafer, and the DC field accelerates the etching ions or an inactive carrier gas ions towards the wafer in a vertical flux pattern. The resulting etching, if properly controlled, is highly anisotropic with oxide holes
16
having aspect ratios of five or even more being attainable.
However, this anisotropic inter-level etch has at least two problems. First, very highly anisotropic etching often requires the use of high-density plasma reactors, often using inductive coupling of RF energy into plasma source region of the etch reactor as well as the capacitive coupling of RF energy onto the pedestal to create the DC self-bias. The recently developed high-density plasma reactors are expensive. Secondly, the filling of the metal layer
14
into a narrow and deep hole
16
becomes problematic. Sputter deposition of the metal tends to bridge the top of a rectangular hole
16
before it is filled, thus creating a void in the contact or via. Methods are available to fill such a narrow and deep hole, but again these methods are complex and often require expensive metal deposition equipment.
In some structures, the contact or via needs to be narrow at its bottom but the spacing is more relaxed at its top. Typically, the resolution required of wiring patterns decreases in the upper wiring layers. To take advantage of these differing requirements, a wine-glass etch pattern, as illustrated in
FIG. 1
, has been developed. The hole includes a highly anisotropic lower portion
18
(referred to as the stem) and a wider upper portion
20
(referred to as the bowl).
One way of forming the wine glass, as partially illustrated in the cross-sectional view of
FIG. 2
, is to cover the oxide layer
10
with a patterned mask layer
22
having an mask aperture
24
generally conforming to the area of the stem
18
and the desired area of the contact to the substrate
12
. A first etching step uses an isotropic etch which not only etches downwardly in the area beneath the mask aperture
24
but also etches sidewardly to undercut the mask layer. The generally isotropic etch can be performed in a plasma reactor without significant RF biasing of the pedestal or with a remote plasma source (RPS). As the figure shows, the isotropic etch with RPS actually etches somewhat more laterally than vertically. Typically, the lateral-to-vertical ratio (L/V) depends on the density and dopant level of the material being etched. Less dense, highly doped materials etch with L/V ratios near or below 1.0 while dense, undoped films etch with L/V ratios ranging from 1.3 to 2.0. After the desired depth of the bowl
20
has been etched in the oxide
10
, the structure is anisotropically etched through the oxide layer
10
to the underlying layer
12
, as described above, to form the stem
18
underlying the mask aperture. The metal layer
14
is then sputtered to fill the wineglass-shaped hole
16
.
The aspect ratio of the stem portion
18
of the hole
16
is significantly less than a substantially vertical hole
16
extending all the way from the surface of the oxide
10
, thus not requiring complex and expensive etch equipment or alternatively an etching chemistry requiring precise control in a commercial environment. Also, metal filling of the wine-glass hole
16
is also more easily accomplished, thus simplifying that step as well.
Nonetheless, standard wine-glass oxide etching has its problems. For a given size of mask aperture
24
, there is only a limited range with the described isotropic etch to control the ratio of the vertical and horizontal dimensions of the bowl
20
. The L/V ratio can be controlled with the RPS chamber by varying control parameters such as cathode temperature, the ratio of O
2
/CF
4
(or other fluorine containing gas), and pressure. However, a typically attainable L/V range is limited to about ±20% with these control parameters. Furthermore, the parameters needed to reduce the L/V ratio substantially reduce the etch rate. Generally, in the conventional processes, the lateral dimension of the bowl
20
tends to be too large, particularly as the spacing between contacts continues to decrease. Nonetheless, the depth of the bowl
20
should be maintained relatively large so as to promote metal filling of the narrow stem
18
. Thus, it is desired to reduce the ratio of lateral to vertical etching in the bowl etch. Furthermore, to optimize an integrated process of etching and filling, it is desired to be able to control the lateral-to-vertical ratio as well as to more finely control the shape of the bowl. Such control is not directly available in the processes of the prior art.
SUMMARY OF THE INVENTION
The invention may be summarized as a three-step wine-glass etch process with a common mask. In the first step, an anisotropic etch is performed to a depth determining the vertical dimension of the bowl of the wine glass. In the second step, an isotropic etch is performed to achieve the desired lateral extent. The isotropic etch will further increase the depth of the bowl. In the third step, another anisotropic etch is performed to etch the stem of the wineglass down to the underlying layer.
REFERENCES:
patent: 4495220 (1985-01-01), Wolf et al.
patent: 4865685 (1989-09-01), Palmour
patent: 5021920 (1991-06-01), Smith
patent: 5180689 (1993-01-01), Liu et al.
patent: 5399237 (1
Brooks Cynthia B.
Merry Walter R.
Regis Jason
Stinnett James A.
Applied Materials Inc.
Bowers Charles
Guenzer Charles S.
Kebede Brook
LandOfFree
Oxide plasma etching process with a controlled wineglass shape does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Oxide plasma etching process with a controlled wineglass shape, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Oxide plasma etching process with a controlled wineglass shape will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2888649