Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-03-21
2006-03-21
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
07017092
ABSTRACT:
A monitoring device on-chip. The monitoring device includes characteristic circuits, test circuits, and select circuits and is incorporated into an integrated circuit. The test circuit is cascaded by the characteristic circuit and a select circuit is incorporated to switch to output the test signal or the characteristic signal. There is another select circuit to switch the output signal of the integrated circuit in a normal mode or the signal of the output end of the characteristic circuit. Therefore, the output end of the select circuit can output the integrated circuit's signals, test signals, and characteristic signals without additional output pins.
REFERENCES:
patent: 2002/0176190 (2002-11-01), Cyrusian
patent: 2003/0018939 (2003-01-01), Kinoshita et al.
Einfeld, J. et al.; A new test circuit for the matching characterization of npn bipolar transistors; Microelectronic Test Structures, 2004. Proceedings. ICMTS '04. The International Conference on , Mar. 22-25, 2004; pp. 127-131.
Dildine R. Stephen
Faraday Technology Corp.
Hsu Winston
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