Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-03-22
2011-03-22
Beausoliel, Robert (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S732000, C714S735000, C714S736000, C714S742000
Reexamination Certificate
active
07913137
ABSTRACT:
Disclosed herein are exemplary embodiments of a so-called “X-press” test response compactor. Certain embodiments of the disclosed compactor comprise an overdrive section and scan chain selection logic. Certain embodiments of the disclosed technology offer compaction ratios on the order of 1000×. Exemplary embodiments of the disclosed compactor can maintain about the same coverage and about the same diagnostic resolution as that of conventional scan-based test scenarios. Some embodiments of a scan chain selection scheme can significantly reduce or entirely eliminate unknown states occurring in test responses that enter the compactor. Also disclosed herein are embodiments of on-chip comparator circuits and methods for generating control circuitry for masking selection circuits.
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Mukherjee Nilanjan
Rajski Janusz
Tyszer Jerzy
Beausoliel Robert
Klarquist & Sparkman, LLP
Mentor Graphics Corporation
Merant Guerrier
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