Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Inventor
active
Bist architecture for detecting path-delay faults in a sequentia
Continuous application and decompression of test patterns to...
Continuous application and decompression of test patterns to...
Decompressor/PRPG for applying pseudo-random and...
Decompressor/PRPG for applying pseudo-random and...
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