Nonvolatile memory devices and methods of fabricating the same

Details Nonvolatile memory devices and methods of fabricating the same Nonvolatile memory devices and methods of fabricating the same

2006-01-31

2006-01-31

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S324000

Reexamination Certificate

active

06991986

ABSTRACT:
A lower insulation layer, a charge storing layer, and an upper insulation layer are sequentially stacked on a substrate to form a gate insulation layer. A gate conductive layer is formed on the gate insulation layer. The gate electrode is patterned to expose a surface of the gate insulation layer. The charge storing layer is a barrier layer to oxygen diffusion during oxidization for curing etching damages caused by patterning. Thus, a gate bird's beak is prevented in the lower insulation layer. Spacers are formed on sidewalls of the gate electrode. The upper insulation layer is etched using the gate electrode and the spacers as an etch mask. Impurity ions are implanted into the substrate adjacent to the gate electrode to form an impurity region. Since an upper insulation layer is not exposed during the ion implantation process, the upper insulation layer is not damaged.

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