Nonvolatile memory devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S258000, C438S263000, C438S264000, C257S314000, C257S315000, C257S316000, C257S326000, C257S321000, C257SE21690

Reexamination Certificate

active

10867152

ABSTRACT:
Nonvolatile memory devices and methods for fabricating the same are provided. The device includes first and second base patterns disposed under floating and selection gates, respectively, at an active region. A channel region is formed in the active region between the first and second base patterns, and source and drain regions are formed in the active region adjacent to the first and second base patterns, respectively. The method includes forming first and second base patterns on a semiconductor substrate to be separated from each other by a predetermined space. A channel region is formed in the semiconductor substrate between the first and second base patterns. Source and drain regions are formed in the semiconductor substrate adjacent to the reverse side of the channel region on the basis of the first and second base patterns, respectively. A tunnel oxide layer is formed on a predetermined region of the channel region. A memory gate is formed to cover the first base pattern and the tunnel oxide layer. A selection gate pattern is then formed to cover the second base pattern.

REFERENCES:
patent: 5723888 (1998-03-01), Yu
patent: 6127224 (2000-10-01), Pio
patent: 6221716 (2001-04-01), Lee et al.
patent: 6465307 (2002-10-01), Chidambaram et al.
patent: 6479347 (2002-11-01), Dalla Libera et al.
patent: 2003/0127684 (2003-07-01), Yoo et al.

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