Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-10-30
2009-11-17
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S304000, C257SE21423
Reexamination Certificate
active
07618864
ABSTRACT:
Example embodiments relate to a semiconductor memory device and methods of forming the same. Other example embodiments relate to a nonvolatile memory device and methods of forming the same. The memory device may include memory cells separately formed on a channel region between impurity regions formed on a substrate. The memory cells may each include a memory layer having a tunnel insulating layer, a nano-sized charge storage layer, and a blocking insulating layer and a side gate formed on the memory layer. According to example embodiments, larger scale integration of the nonvolatile memory devices may be achieved and the reliability of the memory devices may increase.
REFERENCES:
patent: 6673677 (2004-01-01), Hofmann et al.
patent: 6927131 (2005-08-01), Kim
patent: 1020040072342 (2004-08-01), None
patent: 1020040085663 (2004-10-01), None
Kim Dong-won
Kim Sung-hwan
Oh Chang-woo
Park Dong-gun
Chaudhari Chandra
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
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