Non-volatile semiconductor storage device and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S261000, C438S264000, C257S324000, C257S326000, C257SE29309, C257SE21423, C257SE21679

Reexamination Certificate

active

07910432

ABSTRACT:
Each of the memory strings includes: a first columnar semiconductor layer extending in a vertical direction to a substrate; a plurality of first conductive layers formed to sandwich an insulation layer with a charge trap layer and expand in a two-dimensional manner; a second columnar semiconductor layer formed in contact with the top surface of the first columnar semiconductor layer and extending in a vertical direction to the substrate; and a plurality of second conductive layers formed to sandwich an insulation layer with the second columnar semiconductor layer and formed in a stripe pattern extending in a first direction orthogonal to the vertical direction. Respective ends of the plurality of first conductive layers in the first direction are formed in a stepwise manner in relation to each other, entirety of the plurality of the second conductive layers are formed in an area immediately above the top layer of the first conductive layers, and the plurality of first conductive layers and the plurality of second conductive layers are covered with a protection insulation layer that is formed continuously with the plurality of first conductive layers and the second conductive layers.

REFERENCES:
patent: 6727544 (2004-04-01), Endoh et al.
patent: 6870215 (2005-03-01), Endoh et al.
patent: 2007/0252201 (2007-11-01), Kito et al.
patent: 2008/0149913 (2008-06-01), Tanaka et al.

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