Non-volatile memory device architecture, for instance a...

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S189050, C365S189120, C365S220000, C365S221000

Reexamination Certificate

active

07151705

ABSTRACT:
The present invention relates to a non volatile memory device architecture, for example of the Flash type, incorporating a memory cell array and an input/output interface to receive memory data and/or addresses from and to the outside of the device. The interface operates generally according to a serial communication protocol, but it is equipped with a further pseudo-parallel communication portion with a low pin number incorporating circuit blocks for selecting the one or the other communication mode against an input-received selection signal.

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patent: 5808929 (1998-09-01), Sheikholeslami et al.
patent: 5966723 (1999-10-01), James et al.
patent: 6466505 (2002-10-01), Landry
patent: 6510487 (2003-01-01), Raza et al.
patent: 6777979 (2004-08-01), Zhu et al.
European Search Report, EP 02425730, Apr. 10, 2003.

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