Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2006-12-19
2006-12-19
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S189050, C365S189120, C365S220000, C365S221000
Reexamination Certificate
active
07151705
ABSTRACT:
The present invention relates to a non volatile memory device architecture, for example of the Flash type, incorporating a memory cell array and an input/output interface to receive memory data and/or addresses from and to the outside of the device. The interface operates generally according to a serial communication protocol, but it is equipped with a further pseudo-parallel communication portion with a low pin number incorporating circuit blocks for selecting the one or the other communication mode against an input-received selection signal.
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European Search Report, EP 02425730, Apr. 10, 2003.
Perroni Maurizio Francesco
Polizzi Salvatore
Schillaci Paolino
Dinh Son T.
Graybeal Jackson Haley LLP
Jorgenson Lisa K.
Rusyn Paul F.
STMicroelectronics S.r.l.
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