Non-volatile memory device and manufacturing method and...

Details Non-volatile memory device and manufacturing method and... Non-volatile memory device and manufacturing method and...

2006-11-10

2008-11-18

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21179, C438S954000

Reexamination Certificate

active

07452775

ABSTRACT:
A non-volatile memory device having a substrate, an n type well, a p type well, a control gate, a composite dielectric layer, a source region and a drain region is provided. A trench is formed in the substrate. The n type well is formed in the substrate. The p type well is formed in the substrate above the n type well. The junction of p type well and the n type well is higher than the bottom of the trench. The control gate which protruding the surface of substrate is formed on the sidewalls of the trench. The composite dielectric layer is formed between the control gate and the substrate. The composite dielectric layer includes a charge-trapping layer. The source region and the drain region are formed in the substrate of the bottom of the trench respectively next to the sides of the control gate.

REFERENCES:
patent: 5888868 (1999-03-01), Yamazaki et al.
patent: 7154142 (2006-12-01), Wong et al.
patent: 2004/0197994 (2004-10-01), Hung et al.
patent: 1391286 (2003-01-01), None

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