Non-volatile memory device and fabricating method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21179

Reexamination Certificate

active

07344944

ABSTRACT:
A non-volatile memory device comprises a gate line that includes a gate dielectric layer, a bottom gate pattern, an inter-gate dielectric and a top gate pattern, which are sequentially stacked. The width of the inter-gate dielectric is narrower than that of the bottom gate pattern.

REFERENCES:
patent: 4780431 (1988-10-01), Maggioni
patent: 5894146 (1999-04-01), Pio et al.
patent: 6221717 (2001-04-01), Cremonesi et al.
patent: 6541324 (2003-04-01), Wang
patent: 1345466 (2002-04-01), None

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