Non-volatile memory cell with dielectric spacers along...

Details Non-volatile memory cell with dielectric spacers along... Non-volatile memory cell with dielectric spacers along...

2005-03-22

2005-03-22

Nadav, Ori (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S265000, C438S591000, C438S954000

Reexamination Certificate

active

06869843

ABSTRACT:
A disclosed method for forming a non-volatile memory cell includes forming a component stack including an electron trapping layer on a substrate surface. A dielectric layer is formed over the component stack, and a portion is removed such that a remainder of the dielectric layer exists substantially along sidewalls of the component stack. An oxide layer is formed over a bit line in the substrate adjacent to the component stack, and an electrically conductive layer is formed over the component stack and the oxide layer. A described non-volatile memory cell includes a component stack on a substrate surface, the component stack including an electron trapping layer. Multiple dielectric spacers are positioned along sidewalls of the component stack. An oxide layer is positioned over a bit line in the substrate adjacent to the component stack, and an electrically conductive layer is positioned over the component stack and the oxide layer.

REFERENCES:
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5836772 (1998-11-01), Chang et al.

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