Non-volatile memory cell structure and process for forming same

Details Non-volatile memory cell structure and process for forming same Non-volatile memory cell structure and process for forming same

1995-06-07

1998-05-12

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438981, H01L 218247

Patent

active

057504270

ABSTRACT:
A non-volatile split-gate memory cell 8 which can be programmed with only a five volt power supply and is fabricated using standard transistor processing methods, comprises a semiconductor substrate 10 with a source 12 and a drain 14 region separated by a channel region 16. A conductive floating gate 18 is formed over a portion 16a of the channel region 16 and separated by a FAMOS oxide 20. A conductive control gate 22 is formed over but electrically insulated from the floating gate 18 and over a second portion 16b of the channel region 16. The control gate 22 is separated from the second portion of the channel 16b by a pass oxide 26 which is thicker than the FAMOS oxide 20. Other embodiments and processes are also disclosed.

REFERENCES:
patent: 4622656 (1986-11-01), Kamiya et al.
patent: 5242848 (1993-09-01), Yeh
patent: 5455184 (1995-10-01), Tigelaar

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