NiSi metal gate stacks using a boron-trap

Details NiSi metal gate stacks using a boron-trap NiSi metal gate stacks using a boron-trap

2006-08-29

2006-08-29

Guerrero, Maria F. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S203000, C438S649000, C438S655000, C438S663000, C438S664000

Reexamination Certificate

active

07098094

ABSTRACT:
A capping layer (118) is used during an anneal to form fully silicided NiSi gate electrodes (120). The capping layer (118) comprises a material with an affinity for boron, such as TiN. The capping layer (118) serves as a boron trap that reduces the interface boron concentration for PMOS transistors without reducing the interface arsenic concentration for NMOS transistors.

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