Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-12-06
2002-12-24
Fahmy, Wael (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S270000, C438S272000, C438S268000, C257S301000, C257S302000, C257S304000
Reexamination Certificate
active
06498061
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor devices and more particularly to patterning and forming masks in deep trenches.
2. Description of Related Art
The formation of vertical devices within Deep Trench (DT) structures or any other trench structures for vertical devices often requires processing on one side of a deep trench. For example, this may involve the structuring of gate oxide, isolations or junctions on one side of the trench, whereas the other side of the trench remains unchanged.
The need for one-sided straps in deep trenches is outlined in copending, commonly assigned U.S. patent application (Docket No. FIS-99-0290-US1) Ser. No. 09/603,442, filed Jun. 23, 2000, of R. Divakaruni et al. for “Single Sided Buried Strap”.
SUMMARY OF THE INVENTION
An object of this invention is to provide patterns with sublithographic resolution which overcome the overlay problems associated with aligning successive masks with overlay patterns which are slightly out of alignment.
Another object of this invention is to overcome a problem of a mask covering less than half of a full circle in a deep trench, which is detrimental taking into account mask undercutting during later process steps. invention provides a process flow that converts a positive silicon (Si) mask into a negative silicon dioxide (SiO
2
) mask that can be used as a hard mask for silicon (Si) etching by RIE (Reactive Ion Etching). The invention overcomes overlay problems by employing self-aligned masks thereby providing a higher degree of accuracy than lithographic exposure tools which require independent alignment of successive masks.
This invention is particularly applicable for the formation of vertical devices within trench structures that require isolation on one side of the trench.
This invention describes a process flow for the formation of a positive oxide mask as a result of an angled ion implant (I/I) into silicon (Si) for the etching of polysilicon within the trench.
In accordance with this invention, a process is provided for fabricating a mask in a semiconductor deep trench structure filled with trench fill material. The steps comprise forming a barrier layer over the trench fill material; depositing a thin film masking layer over the barrier layer; performing an angled implant into the masking layer; stripping undoped portions of the masking layer from the deep trench; stripping exposed portions of barrier layer exposing a part of the trench fill polysilicon surface and leaving the remainder of the masking layer exposed; oxidizing exposed portions of trench fill material to form a self-aligned mask, and stripping the remainder of the masking layer, whereby overlay problems are avoided by forming a self-aligned mask. Preferably, the trench fill material comprises polysilicon, the barrier layer comprises a silicon nitride, and the masking layer comprises amorphous silicon. Preferably, the trench fill below the self-aligned mask is doped; and the self-aligned mask comprises an oxidized polysilicon hard mask.
Preferably, the trench fill below the self-aligned mask is doped, andthe self-aligned mask comprises an oxidized polysilicon hard mask. Preferably, the trench is lined with a conformal silicon dioxide layer followed by a conformal silicon nitride layer each having a top surface. The polysilicon trench fill material reaches over the top surfaces of the conformal silicon dioxide layer and the conformal silicon nitride layer.
In accordance with another aspect of this invention, a process for fabricating a mask in a semiconductor deep trench structure filled with trench fill material includes the following steps. Form a doped region in the surface of the trench fill material; form a barrier layer over the trench fill material; deposit an amorphous silicon thin film as a masking layer over the barrier layer; and perform an angled implant of a masking dopant into the amorphous silicon thin film. Then strip undoped portions of masking layer from the deep trench; strip exposed portions of barrier layer exposing a masking part of the trench fill polysilicon surface and leaving the remainder of the masking layer exposed. Counterdope the masking part of the trench fill material; oxidize exposed portions of trench fill material to form a self-aligned hard mask, and strip the remainder of the masking layer, whereby overlay problems are avoided by forming a self-aligned mask.
Preferably, the initial doping of the trench fill material is performed with P type dopant, the masking dopant for the masking layer comprises a P type dopant, the trench fill material comprises polysilicon, the barrier layer comprises silicon nitride, and the masking layer comprises amorphous silicon. Preferably, the counterdoping is an order of magnitude greater than the initial doping. Preferably, the masking dopant for the masking layer comprises a P type dopant, the trench fill material comprises polysilicon, the barrier layer comprises silicon nitride, and the masking layer comprises amorphous silicon.
In accordance with this invention, a self-aligned mask is formed on the surface of a semiconductor deep trench structure filled with trench fill material. As a result, overlay problems are avoided by forming the self-aligned mask. Preferably, the trench fill below the self-aligned mask is doped; the self-aligned mask comprises an oxidized polysilicon hard mask; and the self-aligned mask comprises an oxidized polysilicon hard mask.
In accordance with another aspect of this invention, a self-aligned mask is formed on a semiconductor deep trench structure which is filled with trench fill material. The self-aligned oxidized polysilicon hard mask is formed on the surface of the polysilicon trench fill material in the deep trench. As a result overlay problems are avoided by the alignment provided by the self-aligned mask.
Preferably, the trench fill below the hard mask is counterdoped with arsenic. Preferably, the trench fill is doped with a concentration of boron difluoride about an order of magnitude less than the concentration of arsenic therein. Preferably, the trench fill below the self-aligned mask is doped, and the self-aligned mask comprises an oxidized polysilicon hard mask, the trench fill below the hard mask is doped with arsenic; and trench fill is doped with a concentration of boron difluoride about an order of magnitude less than the concentration of arsenic therein.
REFERENCES:
patent: 5604149 (1997-02-01), Paoli et al.
patent: 5641704 (1997-06-01), Paoli et al.
patent: 6063657 (2000-05-01), Bronner
patent: 6066527 (2000-05-01), Kudelka et al.
patent: 6091094 (2000-07-01), Rupp
patent: 6093614 (2000-07-01), Gruening et al.
patent: 6093624 (2000-07-01), Gruening et al.
patent: 6339241 (2002-01-01), Mandelman et al.
Divakaruni Rama
Kudelka Stephan
Lee Kil-Ho
McStay Irene
Schroeder Uwe
Fahmy Wael
International Business Machines - Corporation
Jones II Graham S.
Lee Hsien Ming
Schmurmann H. Daniel
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