Multiplication of storage capacitance in memory cells by using t

Static information storage and retrieval – Systems using particular element – Capacitors

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365203, G11C 700

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active

056663064

ABSTRACT:
A memory cell for a dynamic random access memory includes a storage transistor that is connected for operation as an amplifier, the drain-to-gate capacitance of the storage transistor functioning as the storage capacitance for the memory cell. An access transistor is interposed between a bit line and the input of the amplifier, for coupling the amplifier to the bit line during write and read operations for the memory cell. During memory cell read operations, the storage capacitance is effectively multiplied by 1+Av, where Av is the gain of the amplifier, providing Miller-effect amplification of the storage capacitance.

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