Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-01-09
2007-01-09
Lamarre, Guy (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S765010, C324S763010, C326S016000
Reexamination Certificate
active
09953486
ABSTRACT:
Error detection mechanisms for devices that have multilevel signal interfaces test multilevel signals of an interface with a binary test apparatus. The error detection mechanisms include converting between multilevel signals of the interface and binary signals of the test apparatus. The error detection mechanisms also include repeated transmission of multilevel signals stored in a memory of a device having a multilevel signal interface for detection by the test apparatus at different binary levels.
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Chang Timothy C.
Liaw Haw-Jyh
Stonecypher William F.
Werner Carl W.
Zerbe Jared L.
Abraham Esaw
Behiel Arthur J.
Lamarre Guy
Lauer Mark
Rambus Inc
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