Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1981-11-02
1983-10-25
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365190, 365230, G11C 700
Patent
active
044123124
ABSTRACT:
A multiaddressable highly integrated semiconductor storage is provided, the storage locations of which are addressable by several independent address systems for parallel reading and/or writing. The storage locations are each made up of n storage elements. One storage location consists, for example, of at least two flip-flops which, via coupling elements are connected to associated separate bit and word lines. Each storage location has at least three independently selectable or addressable entry/exit ports permitting the following operations to be executed in parallel: Read word A, read word B, write word C as well as any combination of two or individual ones of those operations. The number of read ports can be increased by providing further address systems and by substituting triple, quadruple, etc., storage cells for a cell pair.
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Berger Horst H.
Wiedmann Siegfried K.
Hecker Stuart N.
International Business Machines - Corporation
Redmond, Jr. J. C.
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