Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-07-27
2002-05-07
Whitehead, Jr., Carl (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S290000, C438S291000, C438S303000, C438S585000, C438S595000
Reexamination Certificate
active
06383876
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a metal-oxide-semiconductor (MOS) device and, more particularly, to a MOS device in which the dopant concentration in the channel region is nonuniform and also to a method for fabricating the device.
2. Discussion of the Related Art
Although lightly doped substrates generally produce optimum device behavior in long-channel MOS devices, higher substrate doping is required to overcome the detrimental short-channel effects that accompany a reduction of channel length. Increases in substrate dopant concentration, however give rise to larger junction capacitances, lower junction breakdown voltages, and lower carrier mobilities, making such increases in substrate dopant concentration undesirable. Trade-offs must thus be made in selecting the proper substrate dopant concentration to achieve optimum device performance in short-channel MOS devices.
Varying the concentration of dopants in the channel region of an MOS device, the region within the substrate that separates the source and drain regions of the device, has been proposed as one way of mitigating the adverse effects on threshold voltage and subthreshold currents of a reduction of MOS gate length. Nonuniform dopant concentrations in the channel region are usually realized by ion implantation The dependence of dopant concentration on depth achieved by means of ion implantation is often modeled by a Gaussian distribution whose mean is the projected range of the beam (ie., the mean penetration depth of the implanted species along the implantation direction) and whose standard deviation is the projected straggle of the beam (i.e.,the square root of the mean squared deviation of the penetration depth along the implantation direction about the mean penetration depth along the implantation direction). The nonuniformity of dopant concentration over any cross section of the substrate may be described by lines of equal dopant concentration and, when the projected straggle of the beam is small compared to the projected range of the beam, by the line of peak dopant concentration or peak dopant concentration profile, often called simply the doping profile. Two well-known, nonuniform channel doping profiles that have been employed in short-channel MOS devices are the halo-shaped profile and the pulse-shaped profile.
FIG. 1
a
is an idealized cross-sectional view of an short-channel NMOS device whose channel region has a halo-shaped doping profile. The channel region adjacent to those parts of the lightly doped n-type source/drain regions nearest the gate electrode has been implanted with p-type dopants. Heavily doped p-type edge portions
15
a
thus separate lightly doped n-type source/drain regions
16
and the tightly doped p-type channel region under the gate electrode. (Adjacent and contiguous both denote being in close proximity. Adjacent may or may not imply contact, but always implies absence of anything of the same kind in between, while contiguous implies having contact on all or most of one side.)
A short-channel MOS device whose channel region has a halo-shaped doping profile thus includes: a gate oxide
11
on a lightly doped semiconductor substrate
10
of a first conductivity type; a gate electrode
12
on the gate oxide; insulating gate sidewall spacers
17
on the gate oxide contiguous to either side of the gate electrode; lightly doped source/drain regions
16
of a second conductivity type within the substrate to either side of the gate electrode, self-aligned to the gate electrode; heavily doped source/drain regions
18
of the second conductivity type within the substrate to either side of the gate electrode, self-aligned to the sidewall spacers contiguous to the gate electrode; and heavily doped halo-shaped regions
15
a
of the first conductivity type adjacent to the lightly doped source/drain regions
16
of the second conductivity type nearest the gate electrode. More generally, the halo regions may bound from below only the lightly doped source/drain regions or may bound from below both the lightly doped and the heavily doped source/drain regions. In other words, the halo region under some portion of the interface may lie below all parts of the lightly doped source/drain region under that portion of the interface, or the halo region under some portion of the interface may lie below all parts of both the lightly doped and the heavily doped source/drain regions under that portion of the interface.
The halo-shaped doping profile may be formed immediately after the gate electrode has been deposited on the gate oxide by implanting dopants of the first conductivity type with a shallow wafer tilt angle. Alternatively, the halo-shaped doping profile may be formed immediately after the gate sidewall spacers have been formed by implanting dopants of the first conductivity type with a steeper wafer tilt angle. B or BF
2
are typically implanted to form a halo-shaped doping profile in an NMOS device, while As or P are typically implanted to form a halo-shaped doping profile in a PMOS device.
FIG. 1
b
is an idealized cross-sectional view of a short channel NMOS device whose channel region has a pulse-shaped doping profile, a region sometimes referred to as a super-steep retrograde doped channel. The doped channel region may thus be divided into an upper, lightly-doped portion, which is close to the gate oxide, and a lower, heavily-doped portion
15
b
, which is further from the gate oxide and is separated from the gate oxide by the upper, lightly-doped portion.
A short-channel MOS device whose channel region has a pulse-shaped doping profile thus includes: a gate oxide
11
on a lightly doped semiconductor substrate
10
of a first conductivity type; a gate electrode
12
on the gate oxide; insulating gate sidewall spacers
17
on the gate oxide contiguous to either side of the gate electrode; lightly doped source/drain regions
16
of a second conductivity type within the substrate to either side of the gate electrode, self-aligned to the gate electrode; heavily doped source/drain regions
18
of the second conductivity type within the substrate to either side of the gate electrode, self-aligned to the sidewall spacers contiguous to the gate electrode; a heavily doped pulse-shaped region
15
b
of the first conductivity type at about the same depth as the bottom of the source/drain regions; and a lightly doped region
19
of the first conductivity type between heavily doped region
15
b
and gate oxide
11
.
A channel region with a pulse-shaped doping profile topped by a uniformly lightly-doped region may be formed either by implantation of heavy ions, typically Sb or As for a PMOS device or in for an NMOS device, into a uniformly lightly-doped region or by implantation into an undoped substrate followed by epitaxial growth of the uniformly lightly doped region. The heavily-doped region deep within the channel region affects the distant gate oxide-substrate interface by increasing the magnitude of the threshold voltage of the device. The lightly doped region is formed between the heavily doped region and the oxide-substrate interface in order to keep the threshold voltage from changing.
Although either a halo-shaped or a pulse-shaped channel doping profile does mitigate some of the short-channel effects that degrade device performance, neither profile mitigates all adverse short-channel effects and each profile creates additional problems. A halo-shaped channel doping profile effectively keeps the total width of the source and drain depletion regions smaller than the channel length, thereby suppressing subthreshold currents in both the bulk substrate (i.e., punchthrough) and at the gate oxide-substrate interface (i.e., current caused by drain-induced barrier lowering) in a short channel device. The heavily-doped edges that border the source/drain regions when the channel region has a halo-shaped doping profile increase the resistance to majority carrier current flow from source to drain. More importantly, a halo-shaped channel doping profile
Huh Ki Jae
Son Jeong Hwan
Jr. Carl Whitehead
LG Semicon Co. Ltd.
Morgan & Lewis & Bockius, LLP
Thomas Toniae M.
LandOfFree
MOS device having non-uniform dopant concentration and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS device having non-uniform dopant concentration and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS device having non-uniform dopant concentration and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2888548