Methods of T-gate fabrication using a hybrid resist

Details Methods of T-gate fabrication using a hybrid resist Methods of T-gate fabrication using a hybrid resist

1999-04-26

2002-05-14

Whitehead, Jr., Carl (Department: 2822)

Semiconductor device manufacturing: process

Forming schottky junction

Compound semiconductor

C438S182000, C438S300000, C438S579000

Reexamination Certificate

active

06387783

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to T-gate fabrication, and more particularly to fabricating T-gates using a hybrid photoresist (“resist”).
BACKGROUND OF THE INVENTION
A T-gate is a gate conductor structure for a semiconductor device (e.g., metal semiconductor field effect transistors (MESFETs), a high electron mobility transistors (HEMTs), etc.) in which the top of the gate conductor structure is wider than the base of the gate conductor structure. The base of the T-gate is made narrow so that the channel length of the semiconductor device is short (e.g., for high performance such as a high operating frequency and a high transconductance), and the top of the T-gate is made wide so that the conductance of the T-gate remains high (e.g., for high switching speeds).
Because electron beam (“e-beam”) lithography has a resolution of better than 0.1 microns, e-beam lithography is the most commonly used technique for fabricating submicron T-gates. However, despite its fine resolution, because the exposing e-beam must pass through relatively thick resist films (e.g., about one micron), e-beam lithography suffers from poor linewidth control in the multi-layered stacks used in typical T-gate processes. Further, e-beam exposure is a direct write process which is both slow and expensive. Accordingly, a need exists for improved methods of forming T-gate structures.
SUMMARY OF THE INVENTION
To overcome the needs of the prior art, novel methods for forming a T-gate structure (“T-gate”) on a substrate (e.g., a semiconductor substrate such as GaAs, SiGe, etc.) are provided that employ a hybrid resist. The hybrid resist specifically is employed to define a base of the T-gate on the substrate with very high resolution (e.g., less than 0.05 microns).
To define a base of the T-gate, a hybrid resist layer is deposited on the substrate. A mask having a reticle feature with an edge is provided and is positioned above the hybrid resist layer so that the edge of the reticle feature is above a desired location for the base of the T-gate. Thereafter, the hybrid resist layer is exposed to radiation (e.g., deep ultra-violet light, x-rays, I-line, ion beam or e-beam) through the mask, and the exposed hybrid resist layer is developed to define an opening therein for the base of the T-gate. Preferably the loop feature formed in the hybrid resist layer by the reticle feature during exposure is trimmed.
The T-gate may be completed by employing any known T-gate fabrication techniques. Preferably T-gate formation is completed by depositing a second resist layer (e.g., a negative photoresist) over the hybrid resist layer, and by forming a second opening in the second resist layer for a top of the T-gate. A gate metallization layer then is deposited over the second resist layer, within the opening of the second resist layer and within the opening of the hybrid resist layer so as to form the T-gate therein. Thereafter, the gate metallization layer that covers the second resist layer is lifted off, and any remaining second resist layer and the hybrid resist layer are removed from the substrate.
Alternatively, T-gate formation preferably is completed by etching a groove in the substrate through the opening in the hybrid resist layer, by removing the hybrid resist layer and by depositing a conductive material over the substrate to form the base of the T-gate within the groove. Thereafter a second resist layer is deposited over the conductive material and an opening is formed in the second resist layer for a top of the T-gate. The base of the T-gate thereby is exposed. A gate metallization layer is deposited over the second resist layer, within the opening of the second resist layer and over the exposed base of the T-gate, and the gate metallization layer that covers the second resist layer is lifted-off. To complete the T-gate, any remaining second resist layer is removed from the substrate and any unnecessary conductive material (e.g., conductive material that does not form part of the T-gate structure) is etched away. Note that the portion of the gate metallization layer that forms the top of the T-gate serves as an etch mask during the etching of conductive material which does not form part of the T-gate structure.
By employing a hybrid resist to form T-gate structures, the time, expense and poor linewidth control associated with e-beam lithography is avoided. Additionally, because the use of a hybrid resist results in fine, uniform features with image quality that is nearly independent of exposure dose or mask dimensions, device linewidth remains nearly constant across each die and from substrate to substrate.
Other objects, features and advantages of the present invention will become more fully apparent from the following detailed description of the preferred embodiments, the appended claims and the accompanying drawings.


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