Methods of manufacturing multi-layer integrated circuit...

Details Methods of manufacturing multi-layer integrated circuit... Methods of manufacturing multi-layer integrated circuit...

2006-01-31

2006-01-31

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S308000

Reexamination Certificate

active

06991980

ABSTRACT:
Integrated circuit capacitor electrodes include a first conductive ring on a face of an integrated circuit substrate. A second conductive ring is provided on the first conductive ring opposite the substrate. A third conductive ring also is provided on the first conductive ring opposite the substrate. The third ring is located at least partially within the second ring. A conductive layer electrically connects the first, second and third rings. To form the electrodes, a first conductive layer is conformally deposited in the areas in which the electrodes will be formed and on a mold oxide layer. A first buffer dielectric layer is deposited on the first conductive layer. The first buffer dielectric layer and the first conductive layer are etched to separate nodes of the first conductive layer. Recessed portions are formed by further etching the first conductive layer. The mold oxide layer and the first buffer dielectric layer deposited beside the recessed portions are etched to define areas in which the upper storage electrodes of dual cylindrical type are formed. A second conductive layer is conformally deposited in the areas in which the upper storage electrodes are formed and on the mold oxide layer and the buffer dielectric layer.

REFERENCES:
patent: 6258691 (2001-07-01), Kim
patent: 6544841 (2003-04-01), Ciavatti
patent: 6720232 (2004-04-01), Tu et al.

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