Methods of manufacturing fin type field effect transistors

Details Methods of manufacturing fin type field effect transistors Methods of manufacturing fin type field effect transistors

2006-02-22

2008-10-28

Dang, Phuc T (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S281000, C257S296000

Reexamination Certificate

active

07442596

ABSTRACT:
A fin type field effect transistor includes a semiconductor substrate, an active fin, a first hard mask layer pattern, a gate insulation layer pattern, a first conductive layer pattern, and source/drain regions. The active fin includes a semiconductor material and is formed on the substrate and extends in a direction away from a major surface of the substrate. The first hard mask layer pattern is formed on a distal surface of the active fin from the substrate. The gate insulation layer is formed on a sidewall portion of the active fin. The first conductive layer pattern includes a metal silicide and is formed on surfaces of the substrate and the gate insulation layer pattern, and on a sidewall of the first hard mask pattern. The source/drain regions are formed in the active fin on opposite sides of the first conductive layer pattern.

REFERENCES:
patent: 6555453 (2003-04-01), Xiang et al.
patent: 6770516 (2004-08-01), Wu et al.
patent: 6969659 (2005-11-01), Anderson et al.
patent: 7166895 (2007-01-01), Saito
patent: 2005/0186742 (2005-08-01), Oh et al.
patent: 2006/0071291 (2006-04-01), Yagishita
patent: 10-093080 (1998-04-01), None

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