Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-06-23
2000-10-31
Quach, T. N.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438622, 438624, 438631, H01L 218242
Patent
active
061401749
ABSTRACT:
Integrated circuits include an integrated circuit substrate and a plurality of active regions and isolation regions in the integrated circuit substrate. A plurality of conductive and insulating layers are included on the integrated circuit substrate that define regions of high and low topography on the integrated circuit substrate. An underlying wiring layer is provided on the low topography region, but not on the high topography region. An overlying wiring layer is provided on the low topography region and on the high topography region. An insulating layer is provided between the underlying wiring layer and the overlying wiring layer. Memory integrated circuit, DRAM integrated circuit, MML integrated circuit and MDL integrated circuit embodiments may be provided.
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patent: 5763954 (1998-06-01), Hyakutake
patent: 5869392 (1999-02-01), Kimura
patent: 5937322 (1999-08-01), Matsuura
Choi Yong-bae
jang Ju-Won
Kwon Chul-soon
Quach T. N.
Samsung Electronics Co,. Ltd.
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