Methods of forming void-free layers in openings of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S257000, C438S424000, C257S506000, C257S510000

Reexamination Certificate

active

07629217

ABSTRACT:
In a method of manufacturing a floating gate of a non-volatile semiconductor memory, a pattern is formed on a substrate to have an opening that exposes a portion of the substrate. A first preliminary polysilicon layer is formed on the pattern and the exposed portion of the substrate to substantially fill the opening. A first polysilicon layer is formed by partially etching the first preliminary polysilicon layer until a first void formed in the first preliminary polysilicon layer is exposed. A second polysilicon layer is formed on the first polysilicon layer.

REFERENCES:
patent: 5654234 (1997-08-01), Shih et al.
patent: 5903035 (1999-05-01), Wu et al.
patent: 6383867 (2002-05-01), Kim et al.
patent: 6465293 (2002-10-01), Park et al.
patent: 2005/0023634 (2005-02-01), Yoon et al.
patent: 1997-0018360 (1997-04-01), None
patent: 2000-0015110 (2000-03-01), None

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