Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-03-20
1998-04-07
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438261, H01L 218247
Patent
active
057364443
ABSTRACT:
Methods of forming non-volatile memory arrays are described. In one implementation, at least two adjacent laterally spaced apart word lines having floating gates are formed over a semiconductor material substrate. The word lines have respective lateral width dimensions. An insulating material is formed over the word lines and effectively completely covers individual word line tops. Masking material is formed over the insulating material to overlie less than all of each word line's lateral width dimension. The insulating material is etched to a degree sufficient to leave discrete insulating blocks over only a portion of the respective word lines' lateral width dimensions which include the laterally closest portions of the two word lines.
REFERENCES:
patent: 5229326 (1993-07-01), Dennison
patent: 5270240 (1993-12-01), Lee
patent: 5427966 (1995-06-01), Komori
patent: 5484741 (1996-01-01), Bergemont
Kauffman Ralph
Lee Roger
Micro)n Technology, Inc.
Tsai Jey
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