Methods of forming MOS transistors having buried gate...

Details Methods of forming MOS transistors having buried gate... Methods of forming MOS transistors having buried gate...

2008-05-06

2008-05-06

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S265000, C257S331000, C257SE21209

Reexamination Certificate

active

07368348

ABSTRACT:
Methods of forming field effect transistors having buried gate electrodes include the steps of forming a semiconductor substrate having a sacrificial gate electrode buried beneath a surface of the semiconductor substrate and then removing the sacrificial gate electrode to define a gate electrode cavity beneath the surface. The gate electrode cavity is lined with a gate insulating layer. The lined gate electrode cavity is filled with a first insulated gate electrode. A second insulated gate electrode is also formed on a portion of the semiconductor substrate extending opposite the first insulated gate electrode so that a channel region of the field effect transistor extends between the first and second insulated gate electrodes. Source and drain regions are also formed adjacent opposite ends of the first and second insulated gate electrodes.

REFERENCES:
patent: 5578513 (1996-11-01), Maegawa
patent: 6787424 (2004-09-01), Yu
patent: 6936516 (2005-08-01), Goo et al.
patent: 7002207 (2006-02-01), Kim et al.
patent: 11-008390 (1999-01-01), None
patent: 2004-006736 (2004-01-01), None
patent: 1020020078996 (2002-10-01), None
patent: 1020040029582 (2004-04-01), None

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