Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-12-30
1998-07-14
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438394, 438254, H01L 218242
Patent
active
057803366
ABSTRACT:
Methods of forming integrated circuit memory devices, such as DRAM memory cells, include the steps of performing a relatively low dose plug implantation step preferably prior to and after formation of a buried contact hole to expose a storage electrode contact region in a semiconductor substrate. By performing a plug implantation step at a low level prior to formation of a buried contact hole (and after), a memory cell having improved refresh characteristics can be achieved. In particular, the performance of the plug implantation step prior to and after formation of the buried contact hole compensates for substrate damage caused during formation of field oxide isolation regions adjacent the memory cell and during formation of the buried contact hole when the storage electrode contact region is exposed to an etchant.
REFERENCES:
patent: 4716126 (1987-12-01), Cogan
patent: 5198386 (1993-03-01), Gonzalez
patent: 5250832 (1993-10-01), Murai
patent: 5389558 (1995-02-01), Suwanai et al.
Samsung Electronics Co,. Ltd.
Tsai Jey
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