Methods of forming integrated circuit memory devices having impr

Details Methods of forming integrated circuit memory devices having impr Methods of forming integrated circuit memory devices having impr

1996-12-13

2000-06-27

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438239, 438250, 438251, 438252, 438253, 438381, 438393, 438394, 438395, 438396, H01L 218234

Patent

active

060806133

ABSTRACT:
Methods of forming integrated circuit memory devices, such as DRAM memory cells, include the steps of simultaneously forming storage electrode and bit line contact regions of first conductivity type in a semiconductor region of second conductivity type. The contact regions preferably receive a double dose of first conductivity type dopants. This double dose compensates for etching damage caused during processing and improves the memory cell's refresh characteristics. The preferred methods of forming DRAM memory cells include the steps of forming an electrically insulating layer on a face of a semiconductor substrate containing a region of second conductivity type therein (e.g., P-type) extending to the face, and then forming a word line (or segment thereof) on the electrically insulating layer, opposite the region of second conductivity type. Contact regions of first conductivity type for a storage electrode and bit line are then formed at the same time at adjacent opposing edges of the word lines by implanting dopants of first conductivity type into the region of second conductivity type using the word line as an implant mask. A storage electrode of a capacitor is then formed on (or coupled to) the storage electrode contact region adjacent a first edge of the word line and a bit line is also preferably formed on (or coupled to) the bit line contact region adjacent a second edge of the word line. The bit line contact region and storage electrode contact region preferably receive a double dose of first conductivity type dopants by performing a first ion implant step, forming sidewall spacers on the first and second edges of the word line and then performing a second ion implant step using the sidewall spacers as an implant mask.

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