Methods of forming integrated circuit memory devices having impr

Details Methods of forming integrated circuit memory devices having impr Methods of forming integrated circuit memory devices having impr

1997-10-10

1999-03-09

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438240, 438653, H01L 218242

Patent

active

058799826

ABSTRACT:
Methods of forming integrated circuit memory devices include the steps of forming a first electrically insulating layer on a semiconductor substrate containing memory cells in a memory cell array region and peripheral circuits for driving the memory cells in a peripheral circuit region adjacent the memory cell array region. An etch-stopping layer is then formed on the first electrically insulating layer and then steps are performed to form a first electrically conductive layer on the etch-stopping layer, form a ferroelectric layer on the first electrically conductive layer, form a second electrode layer on the ferroelectric layer, etch the second electrode layer and ferroelectric layer in sequence using a first mask to define a second electrode and then etch the first electrically conductive layer using a second mask to simultaneously define a first electrode and a first interconnection layer comprising the same material. A second electrically insulating layer is then formed on the second electrode and first interconnection layer. First and second vias are then formed in the second electrically insulating layer, to expose the second electrode and first interconnection layer, respectively. A second electrically conductive layer is then patterned in the first and second vias.

REFERENCES:
patent: 5296399 (1994-03-01), Park
patent: 5366920 (1994-11-01), Yamamichi et al.
patent: 5550072 (1996-08-01), Cacharelis et al.
patent: 5593914 (1997-01-01), Evans, Jr. et al.

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