Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-08-25
2009-06-23
Lebentritt, Michael S (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000, C438S267000, C257SE21209, C257SE21422, C257SE29301, C257SE29306, C257SE29308
Reexamination Certificate
active
07550347
ABSTRACT:
Methods of forming a gate structure for an integrated circuit memory device include forming a first dielectric layer having a dielectric constant of under 7 on an integrated circuit substrate. Ions of a selected element from group 4 of the periodic table and having a thermal diffusivity of less than about 0.5 centimeters per second (cm2/s) are injected into the first dielectric layer to form a charge storing region in the first dielectric layer with a tunnel dielectric layer under the charge storing region. A metal oxide second dielectric layer is formed on the first dielectric layer, the second dielectric layer. The substrate including the first and second dielectric layers is thermally treated to form a plurality of discrete charge storing nano crystals in the charge storing region and a gate electrode layer is formed on the second dielectric layer. Gate structures for integrated circuit devices and memory cells are also provided.
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Cho Kyoo-chul
Choi Sam-jong
Jung Jae-ryong
Kang Tae-soo
Kim Kyung-soo
Lebentritt Michael S
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
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