Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2003-07-30
2004-04-20
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S241000, C438S286000, C438S296000
Reexamination Certificate
active
06723662
ABSTRACT:
RELATED APPLICATION
This application claims the benefit of Korean Patent Application No. 2002-0046611, filed Aug. 7, 2002, the disclosure of which is hereby incorporated herein by reference in its entirety as if set forth fully herein.
FIELD OF THE INVENTION
The present invention relates to methods for forming integrated circuit devices, and more particularly to methods for forming gate oxide films of a integrated circuit device.
BACKGROUND
In some highly integrated semiconductor devices, shallow trench isolation (STI) structures have been utilized for the isolation of active areas therein. In some conventional processes used to form STI structures, a pad oxide film and a nitride film are successively formed on a silicon substrate and then nitride film is patterned. A trench can be formed by etching the substrate to a predetermined depth using the patterned nitride film as an etching mask. An oxide film is formed to cover the trench and is left only in the trench, using an etch-back process or a chemical-mechanical polishing (CMP) process, thereby forming the STI structure.
A thin oxide film can be formed in the trench using a thermal oxidization process. An oxide film can then be formed to fill the trench in order to compensate for damage to the silicon substrate that may be caused during the etching process. However, the volume of the oxide film in the trench may increase due to the heat generated during successive thermal processes, such as the process for forming the gate oxide film, thereby potentially causing silicon dislocations in the substrate.
If the nitride film that serves as the etching mask is removed using a wet etching process, a dent may occur at the surface boundary between the active region and the STI region. Hence, the thickness of the gate oxide film may be reduced at the edge portion of the active region adjacent to the upper corner of the STI region so that an inverse narrow width effect may occur. The inverse narrow width effect may reduce the reliability of the gate oxide film because the electric field may be concentrated at the edge portion of the active region as the thickness of the gate oxide film is reduced. The inverse narrow width effect may reduce the threshold voltage of a transistor, particularly when the channel width of the transistor is also reduced.
It is known to form a thin nitride liner on the inner sidewall of the trench in order to reduce the thinning of the gate oxide film at the edge portion of the active region and to reduce additional oxidization of the trench due to penetration of oxygen (O
2
) into the inner sidewall of the trench during a successive oxidization process.
Generally, a volume of a layer including silicon increases when the silicon is oxidized. The volume of the oxide film in the trench may, therefore, be increased while the inner sidewall of the trench is oxidized as the oxide film fills the trench. Hence, a stress can be generated in the semiconductor substrate such that silicon dislocation may occur in the substrate which may give rise to a leakage current. The leakage current can be generated by silicon dislocation that may provide a path for an electron flow in the substrate. The nitride liner may reduce a stress caused by the increase in the volume of the insulation film in the trench, and may prevent oxygen from penetrating into the trench during the successive oxidization process discussed above, which may reduce or prevent silicon dislocation and, thereby reduce the leakage current.
It is also known to form multiple gate oxide films having various thickness in various regions of a substrate. For example, some conventional SRAM devices include a dual gate oxide film in which one gate oxide film is thin in the cell region of the SRAM device while the other gate oxide film is thick on the input/output terminal. DRAM devices can also include dual gate oxide films having a thick gate oxide film in the cell region and a thin gate oxide film in the peripheral region. In this case, the refresh operations and the quality of the gate oxide film can be improved because the threshold voltage of a cell transistor therein can be compensated by the increase in the thickness of the gate oxide film in the cell region such that the dosage of ions implanted into the channel can be reduced.
Multiple gate oxide films are generally formed through a wet etching process or a process in which the oxidization rate of an oxide film can be varied by implanting ions, such as fluorine (F) or nitrogen (N) ions. In some conventional methods of forming dual gate oxide films using wet etching, after a first gate oxide film is formed on a semiconductor substrate, a portion of the first gate oxide film is removed from a first region of the semiconductor substrate through a photolithography process and a wet etching process. Then, a second gate oxide film is formed on the whole surface of the substrate so that the dual gate oxide film has a thickness in a second region of the substrate that is greater than the thickness of the dual gate oxide film in the first region of the substrate.
In general, the gate oxide film can be formed: 1) through a dry oxidization process using an O
2
gas; 2) through a hydrochloric acid oxidization process using O
2
/HCl gas; or 3) through a wet oxidization process using a gas of H
2
/O
2
or H
2
O. An oxide film formed by either the dry oxidation process or the hydrochloric acid oxidization process may have defects known as “micro pores” or voids formed therein. However, the hydrochloric acid oxidization process may also provide neutralization (or Gettering) of the alkali metal ions in a silicon oxide film, improved channel mobility, and an improved Time Zero Dielectric Breakdown (TZDB) characteristic indicating the short term reliability of the semiconductor device. In contrast, an oxide film formed using the wet oxidization process may have fewer micro pore defects or voids (compared to both the dry process and the hydrochloric acid oxidization) and may have good Time-Dependent Dielectric Breakdown (TDDB) characteristic representing the long-term reliability of the semiconductor device. Hence, the oxide film may be preferably formed using either the wet process or the hydrochloric acid oxidization process considering the desired reliability of the semiconductor device. On the other hand, because the wet oxidization process can grow an oxide film rapidly, it may be desirable to grow the oxide film using the hydrochloric acid oxidization process in some circumstances, such as where a highly integrated semiconductor device calls for a thin gate oxide film having a thickness of less than approximately 60 Å.
When the gate oxide film is formed in a semiconductor device (having an STI structure including a liner formed in the trench) using the hydrochloric acid oxidization process, the thickness of the gate oxide film can be abnormally thickened at the edge portion of the active region, which is the upper corner of the STI region. As a result, the effective width of the channel that provides a passage for current flow in the device may be shortened and the saturation current may also be reduced which can reduce the speed of the transistor when the transistor is turned “on” (i.e., when a threshold voltage is applied to the gate electrode of the transistor).
FIG. 1
is a graph showing variations of saturation current of a cell transistor according to conventional methods of forming a gate oxide film. For example, in cases where a dual gate oxide film is employed in the semiconductor device having the minimum size of approximately 0.126 &mgr;m, the first gate oxide film formed using a hydrochloric acid oxidization process (denoted by “◯”) has a I
dsat
that is approximately 30 percent less than that of the first gate oxide film formed by the wet oxidization process (denoted by “&Circlesolid;”) when the threshold voltage is about 1.4 Volts (V) as shown in FIG.
1
.
FIG. 2
is a schematic cross-sectional view illustrating thickening of a gate oxide film at edge portion of an active region according to a hy
Han Jae-jong
Kim Sung-eui
Lee Kong-soo
Ghyka Alexander
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
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