Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-05-29
2007-05-29
Fourson, George R. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S287000, C438S284000, C438S285000, C438S694000, C438S696000, C257SE29129, C257SE21179, C257SE21687
Reexamination Certificate
active
11240234
ABSTRACT:
Methods of fabricating a floating gate of a flash memory cell are provided in which a first polysilicon layer is formed between first and second isolation layers. An upper region of the first polysilicon layer is then oxidized. The oxidized upper region of the first polysilicon layer is subsequently removed. A second polysilicon layer is formed on the first polysilicon layer. The second polysilicon layer and the first polysilicon layer are patterned to form the floating gate.
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patent: 6448606 (2002-09-01), Yu et al.
patent: 6498064 (2002-12-01), Tseng
patent: 6620681 (2003-09-01), Kim et al.
patent: 7064064 (2006-06-01), Chen et al.
patent: 2005/0142765 (2005-06-01), Joo
Jang Won-Jun
Kim Jung-Hwan
Leam Hun-Hyeoung
Lee Jai-Dong
Lee Sang-Hun
Fourson George R.
Maldonado Julio J.
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
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