Methods of fabricating ferroelectric memory devices having...

Details Methods of fabricating ferroelectric memory devices having... Methods of fabricating ferroelectric memory devices having...

2007-04-24

2007-04-24

Hoang, Quoc (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S295000, C257SE21644, C365S145000

Reexamination Certificate

active

11029232

ABSTRACT:
A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of rows and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

REFERENCES:
patent: 5959879 (1999-09-01), Koo
patent: 6004839 (1999-12-01), Hayashi et al.
patent: 6310374 (2001-10-01), Satoh et al.
patent: 6410397 (2002-06-01), Ochiai et al.
patent: 6952028 (2005-10-01), Lee et al.

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