Methods of fabricating contact holes for integrated circuit subs

Details Methods of fabricating contact holes for integrated circuit subs Methods of fabricating contact holes for integrated circuit subs

1999-03-22

2000-02-22

Picardat, Kevin M.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438637, 438668, H01L 214763

Patent

active

060280018

ABSTRACT:
A contact hole for an integrated circuit substrate is fabricated by forming first and second layers on an integrated circuit substrate and a photoresist pattern on the second layer including a first opening therein. The second layer is etched through the first opening to define a sidewall therein while concurrently forming a polymer on the sidewall, so as to form a second opening in the second layer that is smaller than the first opening. The etching step preferably comprises the step of etching the second layer using a fluorocarbon to define a sidewall therein while concurrently forming a fluorocarbon polymer on the sidewall. The first layer is then etched through the second opening to form the contact hole to the integrated circuit substrate. A conductive layer may be formed in the contact hole to form a conductive contact that electrically contacts the integrated circuit substrate. Accordingly, by concurrently etching the second layer and forming a polymer on the etched sidewall thereof, smaller openings may be formed in the second layer than are formed in the photoresist pattern thereon.

REFERENCES:
patent: 5612240 (1997-03-01), Chang
patent: 5651857 (1997-07-01), Cronin et al.
patent: 5670401 (1997-09-01), Tseng
patent: 5670427 (1997-09-01), Cho
patent: 5677242 (1997-10-01), Aisou
patent: 5719089 (1998-02-01), Cherng et al.
patent: 5817579 (1998-10-01), Ko et al.

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