Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-22
2005-03-22
Thompson, Craig A. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S314000
Reexamination Certificate
active
06869837
ABSTRACT:
A method of fabricating word-line spacers comprising the following steps. A substrate having an inchoate split-gate flash memory structure formed thereover is provided. A conductive layer is formed over the substrate and the inchoate split-gate flash memory structure. The conductive layer having: a upper portion and lower vertical portions over the inchoate split-gate flash memory structure; and lower horizontal portions over the substrate. A dual-thickness oxide layer is formed over the conductive layer and has a greater thickness over the upper portion of the conductive layer. The oxide layer is partially etched back to remove at least the oxide layer from over the lower horizontal portions of the conductive layer to expose the underlying portions of the conductive layer. Then etching: away the exposed portions of the conductive layer over the substrate; and through at least a portion of the thinned oxide layer and into the exposed underlying portion of the conductive layer to expose a portion of the inchoate split-gate flash memory structure and to form the word-line spacers adjacent the inchoate split-gate flash memory structure.
REFERENCES:
patent: 5084406 (1992-01-01), Rhodes et al.
patent: 6242309 (2001-06-01), Lee
patent: 6599797 (2003-07-01), Hofmann et al.
patent: 20040077144 (2004-04-01), Hsieh
Huang Tsung-Hsun
Liu Yuan-Hung
Lo Chi-Hsin
Ouyang Hsiu
Tsai Chia-Shiung
Taiwan Semiconductor Manufacturing Company
Thompson Craig A.
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