Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2011-02-22
2011-02-22
Nguyen, Dang T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S191000, C365S198000, C710S100000
Reexamination Certificate
active
07894275
ABSTRACT:
A method may be provided to communicate a plurality of groups of output data bits representing a respective plurality of groups of input data bits over a data bus with each group of output data bits and each group of input data bits have an equal data width. Each of the plurality of groups of input data bits at may be received at a data register. For each group of input data bits received at the data register, if a number of data bits of the group of input data bits having a first logic level is greater than half of the data width, the group of input data bits are inverted, the inverted group of input data bits are transmitted as a respective group of output data bits in parallel over the data bus, and an inversion flag associated with the respective group of output data bits is transmitted. For each group of input data bits received at the data register, if a number of data bits of the group of input data bits having a second logic level different than the first logic level is greater than half of the data width, the group of input data bits is transmitted without inversion as a respective group of output data bits in parallel over the data bus, and a non-inversion flag associated with the respective group of output data bits is transmitted. Related systems are also discussed.
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Choi Jung-yong
Lee Dong-Woo
Myers Bigel & Sibley & Sajovec
Nguyen Dang T
Samsung Electronics Co,. Ltd.
Sofocleous Alexander
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