Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-01-21
1999-01-12
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438244, 438633, H01L 218242
Patent
active
058588337
ABSTRACT:
Integrated circuit memory devices are manufactured by forming spaced apart source and drain regions in an integrated circuit substrate, and an insulated gate on the integrated circuit substrate therebetween. An interlayer insulating layer is formed on the integrated circuit substrate, including first and second conductive pad contacts which extend therethrough and which electrically contact the source and the drain region, respectively. A trench is formed in the interlayer insulating layer, including in the second conductive pad contact. A first insulating layer is formed to line the trench, except for adjacent the second conductive pad contact. A buried bit line is formed in the trench, electrically contacting the second conductive pad contact through the first insulating layer. A second insulating layer is formed on the first insulating layer and on the buried bit line, except for adjacent the first conductive pad contact. A patterned storage electrode is formed on the second insulating layer, which electrically contacts the first conductive contact pad.
REFERENCES:
patent: 5665624 (1997-09-01), Hong
patent: 5688720 (1997-11-01), Hayashi
patent: 5723381 (1998-03-01), Grewal et al.
Hwang Chang-gyu
Lee Won-seong
Chaudhari Chandra
Samsung Electronics Co,. Ltd.
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