Methods for forming vertical electrode structures and related st

Details Methods for forming vertical electrode structures and related st Methods for forming vertical electrode structures and related st

1997-02-25

1999-07-27

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438254, H01L 218242

Patent

active

059306211

ABSTRACT:
A method for forming an electrode for an integrated circuit device includes the steps of forming a first conductive layer on a surface of a microelectronic substrate, and forming a patterned photoresist layer on the first conductive layer. A spacer is formed along sidewalls of the patterned photoresist layer, and the first conductive layer is etched to a predetermined depth less than a thickness of the first conductive layer using the patterned photoresist layer and the spacer as an etch mask thereby defining a hole in the first conductive layer. A protective layer is formed in the hole which covers exposed portions of the first conductive layer, and the patterned photoresist layer is removed. The first conductive layer is then etched using the spacer and the protective layer as an etching mask to form a vertical electrode structure. Related structures are also discussed.

REFERENCES:
patent: 5330614 (1994-07-01), Ahn
patent: 5508223 (1996-04-01), Tseng
patent: 5759888 (1998-06-01), Wang et al.

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