Methods for forming integrated circuit memory devices having dee

Details Methods for forming integrated circuit memory devices having dee Methods for forming integrated circuit memory devices having dee

1997-04-25

1999-07-20

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438250, 438381, 438393, H01L 218234

Patent

active

059267070

ABSTRACT:
Methods of forming DRAM memory devices include the steps of forming deep storage electrode contact regions to improve the refresh characteristics of DRAM memory cells therein. In particular, the methods include the steps of forming an array of DRAM memory cells in a field ion region of second conductivity type. These memory cells contain storage electrode contact regions and bit line contact regions of first conductivity type therein. An electrically insulating layer is then deposited on the memory cells. Storage electrode contact holes are formed in the electrically insulating layer to expose the storage electrode contact regions. Dopants of first conductivity type are then implanted through the storage electrode contact holes and into the storage electrode contact regions at a first energy in a range between about 60 and 150 KeV. Then, dopants of first conductivity type are again implanted through the storage electrode contact holes at a second higher energy in a range between about 200 and 450 KeV. These dual implanting steps are preferably performed to define deep storage electrode contact extensions which extend through the field ion region and form nonrectifying junctions with the semiconductor substrate. These storage electrode contact extensions improve the refresh characteristics of the memory cells in the array by compensating for parasitic electric fields and etching damage in the field ion region.

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