Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-05-03
2008-08-26
Lindsay, Jr., Walter L. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S211000, C438S230000, C438S264000, C438S288000, C257SE21210
Reexamination Certificate
active
07416940
ABSTRACT:
Methods for fabricating a flash memory device are provided. A method comprises forming a plurality of gate stacks overlying a substrate. Each gate stack comprises a charge trapping layer and a control gate. The control gate is a first distance from the substrate. Adjacent gate stacks are a second distance apart. A cell spacer material layer is deposited and is etched to form a spacer about sidewalls of each gate stack. A source/drain impurity doped region is formed adjacent a first gate stack and a last gate stack. The first distance and the second distance are such that, when a voltage is applied to a gate stack during a READ operation, a fringing field is created between the control gate of the gate stack and the substrate and is sufficient to invert a portion of the substrate between the gate stack and an adjacent gate stack.
REFERENCES:
patent: 7071061 (2006-07-01), Pittikoun
patent: 2006/0019445 (2006-01-01), Chen
Shiraiwa Hidehiko
Suh Youseok
Torii Satoshi
Xue Lei
Ingrassia Fisher & Lorenz P.C.
Lee Kyoung
Lindsay Jr. Walter L.
Spansion LLC
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